Patent · US Active

Confinement techniques for non-volatile resistive-switching memories

US7960216B2 · kind B2 · utility

19Cited by
17References
8Claims
0Family size

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Key dates

Filing dateMay 8, 2009
Grant dateJun 14, 2011
Priority date
Expiry dateMay 8, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B63/30

Abstract

Confinement techniques for non-volatile resistive-switching memories are described, including a memory element having a first electrode, a second electrode, a metal oxide between the first electrode and the second electrode. A resistive switching memory element described herein includes a first electrode adjacent to an interlayer dielectric, a spacer over at least a portion of the interlayer dielectric and over a portion of the first electrode and a metal oxide layer over the spacer and the first electrode such that an interface between the metal oxide layer and the electrode is smaller than a top surface of the electrode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.