Process for forming a wire portion in an integrated electronic circuit
US7960255B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 22, 2008 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Sep 22, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/762
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A process for forming a wire portion in an integrated electronic circuit includes epitaxially growing the wire portion on a side surface of a seed layer portion (11, 12). Cross-sectional dimensions of the wire portion correspond to a thickness of the seed layer portion and to a duration of the growing step. The seed layer portion is then selectively removed while the wire portion is retained fixedly on the circuit. Afterwards, heating of the circuit can cause the wire portion becoming rounded in cross-section. The wire portion obtained may be about 10 nanometers in diameter. It may be used for forming a channel of a MOS transistor devoid of short channel effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.