Dummy vias for damascene process
US7960821B2 · kind B2 · utility
6Cited by
35References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2010 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Mar 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device and method of making the integrated circuit device are disclosed. An exemplary apparatus includes: a semiconductor layer; and a dielectric layer on the semiconductor layer, the dielectric layer having conductive vias and dummy vias formed therein, wherein the conductive vias and dummy vias extend varying distances into the dielectric layer, the conductive vias extending through the dielectric layer to the semiconductor layer, and the dummy vias extending through the dielectric layer to a distance above the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.