Limiting guest execution
US7962909B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2005 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Oct 1, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45533
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a processor comprises an execution core configured to execute instructions including instructions comprising a guest and a circuit coupled to the execution core. The circuit is configured to monitor the execution core, and is programmable to limit an execution of the guest in the execution core to an execution interval. In another embodiment, a method comprises establishing an execution interval for a guest to be executed in a processor; and initiating execution of the guest in the processor. The processor includes a circuit configured to monitor execution of the guest to detect an end of the execution interval. A computer accessible medium storing instructions which, when executed, implement the method is also contemplated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.