Scheduling threads in a multiprocessor computer
US7962913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2008 |
| Grant date | Jun 14, 2011 |
| Priority date | — |
| Expiry date | Aug 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.