Mysore S. Srinivas
74Patents
12h-index
45Co-inventors
80Inventor score
Filing activity: Feb 24, 2000 → Oct 25, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9218190B2 | Hybrid virtual machine configuration management | Emerging Cross-Sectional Technologies | 89 | Active |
| US6735769B1 | Apparatus and method for initial load balancing in a multiple run queue system | Physics | 57 | Expired |
| US6651146B1 | Method and apparatus for managing access contention to a linear list without the use of locks | Emerging Cross-Sectional Technologies | 56 | Expired |
| US7698531B2 | Workload management in virtualized data processing environment | Physics | 26 | Active |
| US8438334B2 | Hybrid storage subsystem with mixed placement of file contents | Physics | 22 | Active |
| US7617375B2 | Workload management in virtualized data processing environment | Physics | 22 | Active |
| US8219995B2 | Capturing hardware statistics for partitions to enable dispatching and scheduling efficiency | Physics | 18 | Active |
| US8291430B2 | Optimizing system performance using spare cores in a virtualized environment | Physics | 16 | Active |
| US7231504B2 | Dynamic memory management of unallocated memory in a logical partitioned data processing system | Physics | 16 | Expired |
| US9135079B2 | Dynamically assigning a portion of physical computing resource to logical partitions based on characteristics of executing logical partitions | Physics | 15 | Active |
| US7448036B2 | System and method for thread scheduling with weak preemption policy | Physics | 14 | Expired |
| US7120753B2 | System and method for dynamically adjusting read ahead values based upon memory usage | Physics | 13 | Expired |
| US7360218B2 | System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval | Physics | 12 | Expired |
| US7698707B2 | Scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval | Physics | 12 | Active |
| US7454570B2 | Efficient memory update process for on-the-fly instruction translation for well behaved applications executing on a weakly-ordered processor | Physics | 10 | Expired |
| US7318142B2 | System and method for dynamically adjusting read ahead values based upon memory usage | Physics | 9 | Active |
| US8769210B2 | Dynamic prioritization of cache access | Physics | 9 | Active |
| US7353517B2 | System and method for CPI load balancing in SMT processors | Physics | 9 | Expired |
| US6845504B2 | Method and system for managing lock contention in a computer system | Physics | 9 | Expired |
| US7487503B2 | Scheduling threads in a multiprocessor computer | Physics | 9 | Active |
| US8677050B2 | System, method and computer program product for extending a cache using processor registers | Physics | 8 | Active |
| US7962913B2 | Scheduling threads in a multiprocessor computer | Physics | 8 | Active |
| US7698530B2 | Workload management in virtualized data processing environment | Physics | 7 | Active |
| US9052932B2 | Hybrid virtual machine configuration management | Emerging Cross-Sectional Technologies | 6 | Active |
| US8612986B2 | Computer program product for scheduling ready threads in a multiprocessor computer based on an interrupt mask flag value associated with a thread and a current processor priority register value | Physics | 5 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.