Two step copper electroplating process with anneal for uniform across wafer deposition and void free filling on ruthenium coated wafers
US7964506B1 · kind B1 · utility
37Cited by
59References
29Claims
0Family size
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Key dates
| Filing date | Mar 6, 2008 |
| Grant date | Jun 21, 2011 |
| Priority date | — |
| Expiry date | May 26, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1089
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A two-step semiconductor electroplating process deposits copper onto wafers coated with a semi-noble metal in manner that is uniform across the wafer and free of voids after a post electrofill anneal. A seed-layer plating bath nucleates copper uniformly and conformably at a high density in a very thin film using a unique pulsed waveform. The wafer is then annealed before a second bath fills the features. The seed-layer anneal improves adhesion and stability of the semi-noble to copper interface, and the resulting copper interconnect stays void-free after a post electrofill anneal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.