Method for manufacturing 3D circuits from bare die or packaged IC chips by microdispensed interconnections
US7972650B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2006 |
| Grant date | Jul 5, 2011 |
| Priority date | — |
| Expiry date | Apr 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/1053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an electronic circuit in three-dimensional space provides for interconnecting electronic components within the circuit by directly writing conducting lines. The method may include observing a direct writing tool of a direct write system using a vision system, determining proper placement of the direct writing tool at least partially based on the step of observing, and directly writing conducting lines in three dimensions using the proper placement. The direct writing may be on a surface or in free space. The method may include stacking a plurality of chips to provide a stack having a top surface and edges extending away from the top and interconnecting connections of the chips by directly writing conducting lines along one of the edges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.