Patent · US Active

Integrated circuit and method for determining an integrated circuit layout

US7979828B2 · kind B2 · utility

2Cited by

4References

8Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Andreas Kuesel · Munich, DE
Julie Aunis · Munich, DE
Winfried Kamp · Munich, DE

Key dates

Filing date	Jan 5, 2008
Grant date	Jul 12, 2011
Priority date	—
Expiry date	Nov 19, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/392
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various methods for determining a layout of an integrated circuit are described. For example, a method is described comprising determining a layout of an integrated circuit comprising a plurality of functional cells, wherein a maximum extent of each of the cells in a first direction is identical and wherein an outer boundary of a first cell of the plurality of cells forms a first polygon with at least five corner points; and storing data representing the layout on a computer-readable medium. Integrated circuits in accordance with the layout are also described.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.