Field-effect transistor, semiconductor device, a method for manufacturing them, and a method of semiconductor crystal growth
US7981744B2 · kind B2 · utility
5Cited by
0References
3Claims
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Key dates
| Filing date | Jun 9, 2005 |
| Grant date | Jul 19, 2011 |
| Priority date | — |
| Expiry date | Apr 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field-effect transistor which comprises a buffer layer and a barrier layer each of which is made of a Group III nitride compound semiconductor and has a channel at the interface inside of the buffer layer to the barrier layer, wherein the barrier layer has multiple-layer structure comprising an abruct interface providing layer which composes the lowest semiconductor layer in said barrier layer and whose composition varies rapidly at the interface of said buffer layer, and an electrode connection plane providing layer which constructs the uppermost semiconductor layer and whose upper surface is formed flat.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.