Feature patterning methods and structures thereof
US7981789B2 · kind B2 · utility
2Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2008 |
| Grant date | Jul 19, 2011 |
| Priority date | — |
| Expiry date | Jul 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of patterning features, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a method of patterning a feature includes forming a first portion of the feature in a first material layer. A second portion of the feature is formed in the first material layer, and a third portion of the feature is formed in a second material layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.