Process for filling recessed features in a dielectric substrate
US7989347B2 · kind B2 · utility
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4References
21Claims
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Key dates
| Filing date | Mar 30, 2006 |
| Grant date | Aug 2, 2011 |
| Priority date | — |
| Expiry date | Mar 3, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for filling recessed features of a dielectric substrate for a semiconductor device, comprises the steps (a) providing a dielectric substrate having a recessed feature in a surface thereof, wherein the smallest dimension (width) across said feature is less than ≦200 nm, a conductive layer being present on at least a portion of said surface, (b) filling said recessed feature with a conductive material, and (c) prior to filling said recessed feature with said conductive material, treating said surface with an accelerator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.