Prevention of backside cracks in semiconductor chips or wafers using backside film or backside wet etch

US7989358B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Timothy H. Daubenspeck · Colchester, US
• Jeffrey P. Gambino · Gresham, US
• Jerome B. Lasky · South Burlington, US
• Christopher D. Muzzy · Burlington, US
• Wolfgang Sauter · Avon, US

Key dates

• Filing date: Apr 22, 2008
• Grant date: Aug 2, 2011
• Expiry date: Nov 24, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15311

Abstract

A method of preventing the formation of cracks on the backside of a silicon (Si) semiconductor chip or wafer during the processing thereof. Also provided is a method for inhibiting the propagation of cracks, which have already formed in the backside of a silicon chip during the processing thereof and prior to the joining thereto of a substrate during the fabrication of an electronic package. The methods entail either treating the backside with a wet etch, or alternatively, applying a protective film layer thereon prior to forming an electronic package incorporating the chip or wafer.