Semiconductor wafer with low-K dielectric layer and process for fabrication thereof
US7994069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2005 |
| Grant date | Aug 9, 2011 |
| Priority date | — |
| Expiry date | May 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To improve the mechanical strength of a wafer comprising a low-k dielectric layer, the low-k dielectric layer is formed so as to have certain regions of low dielectric constant and the remainder having a higher mechanical strength. The higher-strength regions may have a relatively-higher value of dielectric constant. Selective ultraviolet curing of a dielectric material can be performed so as to expel a porogen from the region(s) desired to have low dielectric constant. A photomask, hardmask, or opaque resist, patterned so as to define the region(s) to have lower dielectric constant, is used to shield the remainder of the dielectric material from the ultraviolet radiation. Alternatively, a layer of dielectric material can be blanket cured to lower its dielectric constant, then non-critical regions thereof can be selectively over-cured whereby to produce regions of increased mechanical strength.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.