Microprocessor that performs speculative tablewalks
US7996650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2008 |
| Grant date | Aug 9, 2011 |
| Priority date | — |
| Expiry date | Jan 11, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/654
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor performs a speculative page tablewalk. The microprocessor includes a tablewalk engine that determines whether at least one of a predetermined set of conditions exists with respect to characteristics of the page of memory whose physical address specified by a memory access instruction is missing in the TLB, performs operations of the tablewalk in an out-of-order manner with respect to the execution of unretired program instructions older than the memory access instruction while none of the predetermined set of conditions exists, and waits to perform the operations of the tablewalk until the microprocessor has retired all program instructions older than the memory access instruction when at least one of the predetermined set of conditions exists. The predetermined set of conditions may include the tablewalk needing to load information from a strongly-ordered page, update page mapping information, or access a global page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.