Shielded multi-layer package structures
US8004068B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2009 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Oct 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1316
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments include shielded multi-layer packages for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110) is formed over the plurality of electronic components, and a conductive encapsulant structure (115) is formed over the insulating layer. The adhesive layer is detached from the electronic components, and multi-layer circuitry (140) is formed over, and in electrical communication with, the plurality of electronic components. A shielding via (150) is formed through the multilayer circuitry such that it contacts the conductive encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.