Method of testing nonvolatile memory device
US8004914B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2009 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Oct 27, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes performing test bit setting; programming a first page using data set by the test bit setting, and storing a fail status bit in a page buffer, which is connected to a first bit line having a fail status, based on a verification result of the test program; performing a test program and verification on a second page based on a test program and fail status bit storage result of a preceding page, and storing a fail status bit in the page buffer, which is connected to a second bit line having a fail status, based on a verification result of the test program and verification; and after a test program, verification, and fail status bit setting with respect to the entire pages of a memory block are completed, outputting data of the page buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.