Methods for fabricating contacts to pillar structures in integrated circuits
US8008095B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2007 |
| Grant date | Aug 30, 2011 |
| Priority date | — |
| Expiry date | Dec 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
Abstract
A pillar structure that is contacted by a vertical contact is formed in an integrated circuit. A hard mask is formed and utilized to pattern a least a portion of the pillar structure. The hard mask comprises carbon. Subsequently, the hard mask is removed. A conductive material is then deposited in a region previously occupied by the hard mask to form the vertical contact. The hard mask may, for example, comprise diamond-like carbon. The pillar structure may have a width or diameter less than about 100 nanometers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.