Method for forming contact holes in semiconductor device
US8012881B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2010 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Aug 11, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming contact holes in a semiconductor device includes forming a hard mask layer over an etch target layer, forming a first line pattern in the hard mask layer by etching a portion of the hard mask layer through a primary etch process, forming a second line pattern crossing the first line pattern by etching the hard mask layer including the first line pattern through a secondary etch process, and etching the etch target layer by using the hard mask layer including the first line pattern and the second line pattern as an etch barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.