Method for producing an integrated circuit and arrangement comprising a substrate
US8013377B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2008 |
| Grant date | Sep 6, 2011 |
| Priority date | — |
| Expiry date | Jun 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
Embodiments of the invention relate to an integrated circuit comprising a carrier, having a capacitor with a first electrode and a second electrode. The first electrode has a dielectric layer A layer sequence is arranged on the carrier, the capacitor being introduced in said layer sequence, wherein the layer sequence has a first supporting layer and a second supporting layer arranged at a distance above the first supporting layer, wherein the first and the second supporting layer adjoin the first electrode of the capacitor. Methods of manufacturing the integrated circuit are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.