Transistor device and methods of manufacture thereof
US8017484B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 2006 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Sep 8, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming transistor devices and structures thereof are disclosed. A first dielectric material is formed over a workpiece, and a second dielectric material is formed over the first dielectric material. The workpiece is annealed, causing a portion of the second dielectric material to combine with the first dielectric material and form a third dielectric material. The second dielectric material is removed, and a gate material is formed over the third dielectric material. The gate material and the third dielectric material are patterned to form at least one transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.