Tunnel magnetic resistance effect memory
US8018759B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2010 |
| Grant date | Sep 13, 2011 |
| Priority date | — |
| Expiry date | Jun 17, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/935
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory includes: a plurality of memory devices, each including a tunnel magnetic resistance effect device containing a magnetization free layer in which a direction of magnetization can be reversed, a tunnel barrier layer including an insulating material, and a magnetization fixed layer provided with respect to the magnetization free layer via the tunnel barrier layer with a fixed direction of magnetization; a random access memory area in which information is recorded using the direction of magnetization of the magnetization free layer of the memory device; and a read only memory area in which information is recorded depending on whether there is breakdown of the tunnel barrier layer of the memory device or not.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.