Method of forming an insulated gate field effect transistor device having a shield electrode structure
US8021947B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2009 |
| Grant date | Sep 20, 2011 |
| Priority date | — |
| Expiry date | Mar 12, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
Abstract
In one embodiment, a method for forming a transistor having insulated gate electrodes and insulated shield electrodes within trench regions includes forming disposable dielectric stack overlying a substrate. The method also includes forming the trench regions adjacent to the disposable dielectric stack. After the insulated gate electrodes are formed, the method includes removing the disposable dielectric stack, and then forming spacers adjacent the insulated gate electrodes. The method further includes using the spacers to form recessed regions in the insulated gate electrodes and the substrate, and then forming enhancement regions in the first and second recessed regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.