Stacked semiconductor package having adhesive/spacer structure and insulation
US8030134B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2006 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Sep 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Stacked semiconductor assemblies in which a first die is mounted active side upward on a first substrate and is electrically interconnected to the substrate by wire bonding; an adhesive/spacer structure is formed upon the active side of the first die; and a device such as a die or a package or a heat spreader, having an electrically nonconductive side, is mounted upon the adhesive/spacer structure with the electrically nonconductive side facing the first wire bonded die. The side of the device facing the first wire bonded die may be made electrically nonconductive by having an electrically insulating layer, such as a dielectric film adhesive. Also, methods for making the assemblies are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.