Forming a semiconductor package including a thermal interface material
US8030757B2 · kind B2 · utility
3Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2007 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Sep 3, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16152
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a method for placing a thermal interface material (TIM) between a die including a backside metallic (BSM) layer including copper (Cu) and a heat spreader having a contact surface including Cu, where the TIM is formed of an alloy including indium (In) and tin (Sn), and bonding the TIM to the die and the heat spreader to form at least one quaternary intermetallic compound (IMC) layer. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.