System, method and computer program product for providing a new quiesce state
US8032716B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2008 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | May 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1475
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system, method and computer program product for providing a new quiesce state. The method includes receiving a quiesce request at a system controller from an initiating processor. The quiesce request is sent to a plurality of processors. Notification is received at the system controller that the processors have finished purging their translation look aside buffers (TLBs). A fast quiesce reset command is received at the system controller from the initiating processor once updates to the system resources are complete. It is indicated to the processors that the block translation restriction can be dropped in response to receiving the fast quiesce reset command, thereby allowing the processors to continue processing without block translation restrictions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.