Integrated circuit with multiported memory supercell and data path switching circuitry
US8036061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2009 |
| Grant date | Oct 11, 2011 |
| Priority date | — |
| Expiry date | Feb 3, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit. The integrated circuit includes a plurality of memory requesters and a memory supercell. The memory supercell includes a plurality of memory banks each of which forms a respective range of separately addressable storage locations, wherein the memory supercell is organized into a plurality of bank groups. Each of the plurality of bank groups includes a subset of the plurality of memory banks and a corresponding dedicated access port. The integrated circuit further includes a switch coupled between the plurality of memory requesters and the memory supercell. The switch is configured, responsive to a memory request by a given one of the plurality of memory requesters, to connect a data path between the given memory requester and the dedicated access port of a particular one of the bank groups addressed by the memory request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.