Inventor · San Francisco, CA, US

Brian P. Lilly

44Patents
8h-index
56Co-inventors
78Inventor score

Filing activity: Aug 31, 2000 → Feb 20, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US9044630B1 Range of motion machine and method and adjustable crank Human Necessities 82 Active
US6681295B1 Fast lane prefetching Physics 36 Expired
US6654858B1 Method for reducing directory writes and latency in a high performance, directory-based, coherency protocol Physics 24 Expired
US9098418B2 Coordinated prefetching based on training in hierarchically cached processors Physics 14 Active
US6671822B1 Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache Physics 14 Expired
US8352685B2 Combining write buffer with dynamically adjustable flush metrics Physics 12 Active
US8713277B2 Critical word forwarding with adaptive prediction Physics 9 Active
US11544193B2 Scalable cache coherency protocol Physics 8 Active
US8055975B2 Combined single error correction/device kill detection code Physics 6 Active
US9047198B2 Prefetching across page boundaries in hierarchically cached processors Physics 5 Active
US8751746B2 QoS management in the L2 cache Physics 4 Active
US8458406B2 Multiple critical word bypassing in a memory controller Physics 4 Active
US9176879B2 Least recently used mechanism for cache line eviction from a cache memory Physics 3 Active
US9529730B2 Methods for cache line eviction Physics 3 Active
US8347040B2 Latency reduction for cache coherent bus-based cache Physics 3 Active
US7949832B2 Latency reduction for cache coherent bus-based cache Physics 3 Active
US7370151B2 Method and system for absorbing defects in high performance microprocessor with a large n-way set associative cache Physics 3 Expired
US9128857B2 Flush engine Emerging Cross-Sectional Technologies 2 Active
US8036061B2 Integrated circuit with multiported memory supercell and data path switching circuitry Emerging Cross-Sectional Technologies 2 Active
US9280471B2 Mechanism for sharing private caches in a SoC Emerging Cross-Sectional Technologies 2 Active
US9043554B2 Cache policies for uncacheable memory requests Physics 2 Active
US9513693B2 L2 cache retention mode Emerging Cross-Sectional Technologies 1 Active
US9381401B2 Range of motion machine and method and adjustable crank Human Necessities 1 Active
US9229866B2 Delaying cache data array updates Physics 1 Active
US7702858B2 Latency reduction for cache coherent bus-based cache Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.