Patent · US Active

Method for forming a through silicon via (TSV)

US8039386B1 · kind B1 · utility

4Cited by

6References

20Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Thuy B. Dao · Austin, US
Ross E. Noble · Austin, US
Dina H. Triyoso · Mechanicville, US

Key dates

Filing date	Mar 26, 2010
Grant date	Oct 18, 2011
Priority date	—
Expiry date	Mar 26, 2030

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/76814
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method of forming a through silicon via includes forming a via opening in a substrate using a hard mask, wherein a polymer is formed in the via opening. A first wet clean removes a first portion of the polymer and forms a first carbon containing oxide along portions of the sidewalls. A first ash process modifies the first carbon containing oxide and removes a second portion of the polymer. A first wet etch removes the modified first carbon containing oxide and a third portion of the polymer. A second ash process forms a second carbon containing oxide along at least a portion of the sidewalls. A second wet etch process removes the second carbon containing oxide and a fourth portions of the polymer. A third ash process forms a third carbon containing oxide along portions of the sidewalls and removes any remaining portions of the polymer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.