Electronic circuit arrangement

US8039971B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Khalil Hosseini · Weihmichl, DE
• Joachim Mahler · Regensburg, DE

Key dates

• Filing date: May 22, 2007
• Grant date: Oct 18, 2011
• Expiry date: Dec 6, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15747
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a bonding layer. A silver layer for eutectic bonding with the bonding layer is provided on the soldering layer in the region of the chip contact location.