Memory device with emulated characteristics
US8041881B2 · kind B2 · utility
74Cited by
484References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2007 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Jul 17, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory subsystem is provided including an interface circuit adapted for communication with a system and a majority of address or control signals of a first number of memory circuits. The interface circuit includes emulation logic for emulating at least one memory circuit of a second number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.