Stackable molded packages and methods of making the same

US8044494B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Addi B. Mistry · Austin, US
• Marc Alan Mangrum · Austin, US
• David Patten · Austin, US
• Jesse Phou · Austin, US
• Ziep Tran · Austin, US

Key dates

• Filing date: Sep 25, 2009
• Grant date: Oct 25, 2011
• Expiry date: Oct 19, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3511
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A first packaged integrated circuit (IC) includes a package substrate, at least one IC die attached to a first surface of the package substrate, a plurality of conductive members on the first surface at least partially surrounding the at least one IC die and electrically connected to the at least one IC die, an encapsulant over the first surface surrounding the at least one IC die and the plurality of conductive members, wherein at least a portion of each of the plurality of conductive members is exposed by the encapsulant. A second packaged IC may be stacked onto the first packaged IC. The second packaged IC includes at least one IC die and a plurality of conductive members, each conductive member of the plurality of conductive members of the second packaged IC is in contact with a corresponding conductive member of the plurality conductive members of the first packaged IC.