Non-volatile memory and method with improved sensing having bit-line lockout control
US8045391B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 4, 2010 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Oct 4, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In sensing a group of cells in a multi-state nonvolatile memory, multiple sensing cycles relative to different demarcation threshold levels are needed to resolve all possible multiple memory states. Each sensing cycle has a sensing pass. It may also include a pre-sensing pass or sub-cycle to identify the cells whose threshold voltages are below the demarcation threshold level currently being sensed relative to. These are higher current cells which can be turned off to achieve power-saving and reduced source bias errors. The cells are turned off by having their associated bit lines locked out to ground. A repeat sensing pass will then produced more accurate results. Circuitry and methods are provided to selectively enable or disable bit-line lockouts and pre-sensing in order to improving performance while ensuring the sensing operation does not consume more than a maximum current level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.