On-chip embedded thermal antenna for chip cooling
US8053814B2 · kind B2 · utility
45Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2009 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Nov 4, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus comprises a first layer within a semiconductor chip having active structures electrically connected to other active structures and having electrically isolated first inactive structures. A second layer within the semiconductor chip is physically connected to the first layer. The second layer comprises an insulator and has second inactive structures. The first inactive structures are physically aligned with the second inactive structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.