Structures, fabrication methods, design structures for strained fin field effect transistors (FinFets)
US8053838B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2008 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Aug 26, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A semiconductor structure, a fabrication method, and a design structure for a FinFet. The FinFet includes a dielectric layer, a central semiconductor fin region on the dielectric layer, a first semiconductor seed region on the dielectric layer, and a first strain creating fin region. The first semiconductor seed region is sandwiched between the first strain creating fin region and the dielectric layer. The first semiconductor seed region includes a first semiconductor material. The first strain creating fin region includes the first semiconductor material and a second semiconductor material different than the first semiconductor material. A first atom percent of the first semiconductor material in the first semiconductor seed region is different than a second atom percent of the first semiconductor material in the first strain creating fin region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.