Synchronous clock multiplexing and output-enable

US8054103B1 · kind B1 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Jayawardan Janardhanan · Bengaluru, IN
• Gopalkrishna Ullal Nayak · Glasgow, GB
• Vikas Sinha · Austin, US
• Sujoy Chakravarty · Bengaluru, IN
• Shivaprakash Halagur · Bengaluru, IN
• Somasunder Kattepura Sreenath · Savanuru, IN

Key dates

• Filing date: Oct 22, 2010
• Grant date: Nov 8, 2011
• Expiry date: Oct 22, 2030

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F1/12
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A synchronous circuit for clock multiplexing and output-enable is implemented using a pair of logic gates and an output block. Select signals and enable signals with the corresponding logic sense are provided as inputs to the pair of logic gates, which generate respective logic outputs. The output block contains synchronizers clocked by respective input signals, and receives the logic outputs also as inputs. The output block provides a selected one of the input signals as an output, the provision of the selected input signal being accomplished in a synchronous fashion. Enabling and disabling of the output are also performed synchronously.