Vikas Sinha
42Patents
5h-index
68Co-inventors
68Inventor score
Filing activity: Jul 13, 2005 → Sep 11, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10140063B2 | Solid state drive multi-card adapter with integrated processing | Physics | 30 | Active |
| US8229791B2 | Methods, systems, and computer integrated program products for supply chain management | Performing Operations; Transporting | 21 | Active |
| US9077093B1 | Magnetic rotation actuator | Electricity | 8 | Active |
| US9331441B2 | Power adapter with retractable prongs | Electricity | 8 | Active |
| US10481834B2 | Erasure code data protection across multiple NVME over fabrics storage devices | Electricity | 5 | Active |
| US10254998B2 | Coordinated garbage collection of flash devices in a distributed storage system | Physics | 4 | Active |
| US10963388B2 | Prefetching in a lower level exclusive cache hierarchy | Physics | 4 | Active |
| US11048581B2 | Storage device telemetry for provisioning I/O | Physics | 4 | Active |
| US10963394B2 | System and method for optimizing performance of a solid-state drive using a deep neural network | Emerging Cross-Sectional Technologies | 4 | Active |
| US9215833B2 | Electronic device with heat dissipating electromagnetic interference shielding structures | Electricity | 4 | Active |
| US8446198B2 | Phase interpolator and a delay circuit for the phase interpolator | Electricity | 3 | Active |
| US7310058B2 | Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC) | Electricity | 3 | Expired |
| US8054103B1 | Synchronous clock multiplexing and output-enable | Physics | 3 | Active |
| US10996896B2 | Solid state drive multi-card adapter with integrated processing | Physics | 2 | Active |
| US9612632B2 | Wireless electronic device with component cooling structures | Physics | 2 | Active |
| US10318175B2 | SSD with heterogeneous NVM types | Physics | 1 | Active |
| US7576668B2 | Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC) | Electricity | 1 | Active |
| US11301422B2 | System and methods for providing fast cacheable access to a key-value device through a filesystem interface | Physics | 1 | Active |
| US11544187B2 | IO redirection methods with cost estimation | Physics | 1 | Active |
| US11657300B2 | Systems and methods for predicting storage device failure using machine learning | Physics | 1 | Active |
| US11113207B2 | Bypass predictor for an exclusive last-level cache | Emerging Cross-Sectional Technologies | 1 | Active |
| US11290535B2 | System and method for distributed caching | Electricity | 0 | Active |
| US11093393B2 | System and method for early DRAM page-activation | Emerging Cross-Sectional Technologies | 0 | Active |
| US11899964B2 | Methods and systems for memory bandwidth control | Physics | 0 | Active |
| US12197388B2 | System and methods for providing fast cacheable access to a key-value device through a filesystem interface | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.