Sujoy Chakravarty
10Patents
3h-index
19Co-inventors
53Inventor score
Filing activity: Dec 9, 2002 → Sep 21, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8085074B1 | Fast-locking delay locked loop | Electricity | 12 | Active |
| US9407424B1 | Fast locking clock and data recovery using only two samples per period | Electricity | 8 | Active |
| US8704550B2 | Architecture for VBUS pulsing in UDSM processes | Electricity | 4 | Active |
| US9065430B2 | Architecture for VBUS pulsing in UDSM processes | Electricity | 3 | Active |
| US8446198B2 | Phase interpolator and a delay circuit for the phase interpolator | Electricity | 3 | Active |
| US8054103B1 | Synchronous clock multiplexing and output-enable | Physics | 3 | Active |
| US9548855B2 | Method and apparatus for managing estimation and calibration of non-ideality of a phase interpolator (PI)-based clock and data recovery (CDR) circuit | Electricity | 2 | Active |
| US7683716B2 | Constant output common mode voltage of a pre-amplifier circuit | Electricity | 1 | Active |
| US9584108B2 | Apparatus for managing clock duty cycle correction | Electricity | 0 | Active |
| US6703872B2 | High speed, high common mode range, low delay comparator input stage | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.