Process and temperature tolerant non-volatile memory
US8059472B2 · kind B2 · utility
1Cited by
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22Claims
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Key dates
| Filing date | Apr 8, 2010 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Apr 8, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory comprising an array of memory cells and sense amplifiers, each sense amplifier using a keeper circuit to provide an amount of current to compensate for bit line leakage current in the memory array. The amount of current from the keeper depends on the temperature of the memory and the speed of the process used to make the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.