High performance CMOS devices and methods for making same

US8067280B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Chih-Hao Wang · Dashulong, TW
• Ta-Wei Wang · Taipei, TW
• Chenming Hu · Alamo, US

Key dates

• Filing date: Aug 14, 2008
• Grant date: Nov 29, 2011
• Expiry date: Aug 14, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0212

Abstract

An integrated circuit having high performance CMOS devices with good short channel effects may be made by forming a gate structure over a substrate; forming pocket implant regions and source/drain extensions in the substrate; forming spacers along sides of the gate structure; and thermal annealing the substrate when forming the spacers, the thermal annealing performed at an ultra-low temperature. An integrated circuit having high performance CMOS devices with low parasitic junction capacitance may be made by forming a gate structure over a substrate; forming pocket implant regions and source/drain extensions in the substrate; forming spacers along sides of the gate structure; performing a low dosage source/drain implant; and performing a high dosage source/drain implant.