Resistance random access memory structure for enhanced retention
US8067762B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2006 |
| Grant date | Nov 29, 2011 |
| Priority date | — |
| Expiry date | Nov 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A bistable resistance random access memory is described for enhancing the data retention in a resistance random access memory member. A dielectric member, e.g. the bottom dielectric member, underlies the resistance random access memory member which improves the SET/RESET window in the retention of information. The deposition of the bottom dielectric member is carried out by a plasma-enhanced chemical vapor deposition or by high-density-plasma chemical vapor deposition. One suitable material for constructing the bottom dielectric member is a silicon oxide. The bistable resistance random access memory includes a bottom dielectric member disposed between a resistance random access member and a bottom electrode or bottom contact plug. Additional layers including a bit line, a top contact plug, and a top electrode disposed over the top surface of the resistance random access memory member. Sides of the top electrode and the resistance random access memory member are substantially aligned with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.