Memory controller with multi-modal reference pad
US8068357B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2008 |
| Grant date | Nov 29, 2011 |
| Priority date | — |
| Expiry date | Feb 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller operates in two modes to support different types of memory devices. In a first mode, the memory controller distributes a dedicated reference voltage with each of a plurality of signal bundles to a corresponding plurality of memory devices. The reference voltages are conveyed using pads that are alternatively used for e.g. timing-reference signals in a second mode, so the provision for bundle-specific reference voltages need not increase the number of pads on the memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.