Semiconductor device with increased I/O leadframe including passive device
US8072050B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2008 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Jan 2, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In accordance with the present invention, there are provided multiple embodiments of a semiconductor package, each embodiment including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor package. More particularly, each embodiment of the semiconductor package of the present invention includes a generally planar die pad and a plurality of leads. Some of these leads include exposed bottom surface portions or lands which are provided in at least one row or ring which at least partially circumvents the die pad, with other leads including portions which protrude from respective side surfaces of a package body of the semiconductor package. A passive device may be electrically connected to and extend between the die pad and one of the leads, and/or may be electrically connected to and extend between and adjacent pair of the leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.