Semiconductor structure
US8072067B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2009 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Oct 20, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3651
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure including a substrate, an insulating layer, a composite pad structure, a passivation layer, and a bump is provided. A circuit structure is disposed on the substrate. The insulating layer covers the substrate and has a first opening exposing the circuit structure. The composite pad structure includes a first conductive layer, a barrier layer, and a second conductive layer which are sequentially disposed. The composite pad structure is disposed on the insulating layer and fills the first opening to electrically connect to the circuit structure. The passivation layer covers the composite pad structure and has a second opening exposing the composite pad structure. The bump fills the second opening and electrically connects to the composite pad structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.