Balanced semiconductor device packages including lead frame with floating leads and associated methods
US8084846B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2006 |
| Grant date | Dec 27, 2011 |
| Priority date | — |
| Expiry date | Jun 14, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device assembly or package includes at least one semiconductor device that is positioned adjacent to floating leads. Such an assembly or package may include at least two semiconductor devices that face opposite directions from one another, with each being oriented such that bond pads thereof are at an opposite side of the assembly or package from bond pads of the other. Alternatively, an assembly or package may include a lead assembly with an internal portion, including one or more floating leads, and an external portion that are in planes that are offset relative to one another. Methods for designing lead frames, assemblies, and packages are also disclosed, as are assembly and packaging methods.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.