Reducing metal voids in a metallization layer stack of a semiconductor device by providing a dielectric barrier layer

US8097536B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Holger Schuehrer · Dresden, DE
• Juergen Boemmels · Heverlee, BE

Key dates

• Filing date: Sep 23, 2009
• Grant date: Jan 17, 2012
• Expiry date: Jan 6, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Metallization systems on the basis of copper and low-k dielectric materials may be efficiently formed by providing an additional dielectric material of enhanced surface conditions after the patterning of the low-k dielectric material. Consequently, defects such as isolated copper voids and the like may be reduced without significantly affecting overall performance of the metallization system.