Fabrication of asymmetric field-effect transistors using L-shaped spacers
US8101479B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2009 |
| Grant date | Jan 24, 2012 |
| Priority date | — |
| Expiry date | Nov 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate electrode (302) of a field-effect transistor (102) is defined above, and vertically separated by a gate dielectric layer (300) from, a channel-zone portion (284) of body material of a semiconductor body. Semiconductor dopant is introduced into the body material to define a more heavily doped pocket portion (290) using the gate electrode as a dopant-blocking shield. A spacer (304T) having a dielectric portion situated along the gate electrode, a dielectric portion situated along the body, and a filler portion (SC) largely occupying the space between the other two spacer portions is provided. Semiconductor dopant is introduced into the body to define a pair of source/drain portions (280M and 282M) using the gate electrode and spacer as a dopant-blocking shield. The filler spacer portion is removed to convert the spacer to an L shape (304). Electrical contacts (310 and 312) are formed respectively to the source/drain portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.