Process for the simultaneous deposition of crystalline and amorphous layers with doping

US8102052B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Herbert Schafer · Höhenkirchen-Siegertsbrunn, DE
• Martin Franosch · Munich, DE
• Thomas Meister · Taufkirchen, DE
• Josef Bock · Birkenfeld, DE

Key dates

• Filing date: Feb 14, 2011
• Grant date: Jan 24, 2012
• Expiry date: Feb 14, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02661
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.