Methods for forming a transistor and modulating channel stress
US8105908B2 · kind B2 · utility
9Cited by
5References
6Claims
0Family size
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Key dates
| Filing date | Jun 23, 2005 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Apr 7, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
Methods are provided for manufacturing transistors and altering the stress in the channel region of a single transistor. One or more parameters that are effect stress in the channel region are altered for a single transistor to increase or decrease the channel stress in PMOS and NMOS transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.