Bump structure for a semiconductor device and method of manufacture
US8105934B2 · kind B2 · utility
14Cited by
10References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2009 |
| Grant date | Jan 31, 2012 |
| Priority date | — |
| Expiry date | Nov 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device employing the bump structure includes a plurality of bump structures arrayed along a substrate in a first direction. Each bump structure has a width in the first direction greater than a pitch gap between successively arrayed bump structures, and at least one bump structure has a sidewall facing in the first direction that is non-conductive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.